A compact aVLSI conductance-based silicon neuron

Runchun Wang, Chetan Singh Thakur, Tara Julia Hamilton, Jonathan Tapson, André van Schaik

    Research output: Chapter in Book / Conference PaperConference Paperpeer-review

    11 Citations (Scopus)

    Abstract

    We present an analogue Very Large Scale Integration (aVLSI) implementation that uses first-order low-pass filters to implement a conductance-based silicon neuron for high-speed neuromorphic systems. The aVLSI neuron consists of a soma (cell body) and a single synapse, which is capable of linearly summing both the excitatory and inhibitory post-synaptic potentials (EPSP and IPSP) generated by the spikes arriving from different sources. Rather than biasing the silicon neuron with different parameters for different spiking patterns, as is typically done, we provide digital control signals, generated by an FPGA, to the silicon neuron to obtain different spiking behaviours. The proposed neuron is only ~26.5 μm2 in the IBM 130nm process and thus can be integrated at very high density. Circuit simulations show that this neuron can emulate different spiking behaviours observed in biological neurons.
    Original languageEnglish
    Title of host publicationProceedings of the 2015 Biomedical Circuits and Systems Conference (BioCAS 2015): Engineering for Healthy Minds and Able Bodies: Atlanta, Georgia, USA, October 22-24, 2015
    PublisherIEEE
    Pages1-4
    Number of pages4
    ISBN (Print)9781479972333
    DOIs
    Publication statusPublished - 2015
    EventBiomedical Circuits and Systems Conference -
    Duration: 22 Oct 2015 → …

    Conference

    ConferenceBiomedical Circuits and Systems Conference
    Period22/10/15 → …

    Keywords

    • neural networks (neurobiology)
    • neuromorphic engineering

    Fingerprint

    Dive into the research topics of 'A compact aVLSI conductance-based silicon neuron'. Together they form a unique fingerprint.

    Cite this