A Low Power High Input Impedance CMOS Biopotential Integrated Preamplifier

Porika Nandini; Jatoth Deepak Naik; Pradeep Gorre; Alaaddin Al-Shidaifat; Mohammad Khaleqi Qaleh Jooq; Sandeep Kumar; Hanjung Song

doi:10.1007/978-981-97-1943-3_23

A Low Power High Input Impedance CMOS Biopotential Integrated Preamplifier

Porika Nandini, Jatoth Deepak Naik, Pradeep Gorre, Alaaddin Al-Shidaifat, Mohammad Khaleqi Qaleh Jooq, Sandeep Kumar, Hanjung Song

Research output: Chapter in Book / Conference Paper › Conference Paper › peer-review

Abstract

The front-end amplifier is an essential component in neurological monitoring systems for signal detection and preprocessing, affecting besides the quality of the biosignal but additionally detector size and usage of power. In this study, a unique dual feedback loop-controlled method is presented to account for both signal leakage through the input bias network and leakage currents produced by low-noise amplifiers when they are implemented as integrated circuits. The Front-End Amplifier (FEA) is guaranteed to retain a significant input impedance despite all manufacturing and operating changes thanks to this loop design. Results from simulations using the 65 nm CMOS technology are given. This FEA uses 3.14 μW and accomplishes an input impedance of 2 TΩ and input referred noise of 23 pV/√Hz.

Original language	English
Title of host publication	Proceedings of 3rd International Conference on Computational Electronics for Wireless Communications - ICCWC 2023
Editors	Sanyog Rawat, Arvind Kumar, Ashish Raman, Sandeep Kumar, Parul Pathak
Publisher	Springer Science and Business Media Deutschland GmbH
Pages	261-267
Number of pages	7
ISBN (Print)	9789819719426
DOIs	https://doi.org/10.1007/978-981-97-1943-3_23
Publication status	Published - 2025
Externally published	Yes
Event	3rd International Conference on Computational Electronics for Wireless Communications, ICCWC 2023 - Jalandhar, India Duration: 22 Dec 2023 → 23 Dec 2023

Publication series

Name	Lecture Notes in Networks and Systems
Volume	959 LNNS
ISSN (Print)	2367-3370
ISSN (Electronic)	2367-3389

Conference

Conference	3rd International Conference on Computational Electronics for Wireless Communications, ICCWC 2023
Country/Territory	India
City	Jalandhar
Period	22/12/23 → 23/12/23

Bibliographical note

Publisher Copyright:
© The Author(s), under exclusive license to Springer Nature Singapore Pte Ltd. 2025.

UN SDGs

This output contributes to the following UN Sustainable Development Goals (SDGs)

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10.1007/978-981-97-1943-3_23

Cite this

Nandini, P., Naik, J. D., Gorre, P., Al-Shidaifat, A., Jooq, M. K. Q., Kumar, S., & Song, H. (2025). A Low Power High Input Impedance CMOS Biopotential Integrated Preamplifier. In S. Rawat, A. Kumar, A. Raman, S. Kumar, & P. Pathak (Eds.), Proceedings of 3rd International Conference on Computational Electronics for Wireless Communications - ICCWC 2023 (pp. 261-267). (Lecture Notes in Networks and Systems; Vol. 959 LNNS). Springer Science and Business Media Deutschland GmbH. https://doi.org/10.1007/978-981-97-1943-3_23

Nandini, Porika ; Naik, Jatoth Deepak ; Gorre, Pradeep et al. / A Low Power High Input Impedance CMOS Biopotential Integrated Preamplifier. Proceedings of 3rd International Conference on Computational Electronics for Wireless Communications - ICCWC 2023. editor / Sanyog Rawat ; Arvind Kumar ; Ashish Raman ; Sandeep Kumar ; Parul Pathak. Springer Science and Business Media Deutschland GmbH, 2025. pp. 261-267 (Lecture Notes in Networks and Systems).

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abstract = "The front-end amplifier is an essential component in neurological monitoring systems for signal detection and preprocessing, affecting besides the quality of the biosignal but additionally detector size and usage of power. In this study, a unique dual feedback loop-controlled method is presented to account for both signal leakage through the input bias network and leakage currents produced by low-noise amplifiers when they are implemented as integrated circuits. The Front-End Amplifier (FEA) is guaranteed to retain a significant input impedance despite all manufacturing and operating changes thanks to this loop design. Results from simulations using the 65 nm CMOS technology are given. This FEA uses 3.14 μW and accomplishes an input impedance of 2 TΩ and input referred noise of 23 pV/√Hz.",

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Nandini, P, Naik, JD, Gorre, P, Al-Shidaifat, A, Jooq, MKQ, Kumar, S & Song, H 2025, A Low Power High Input Impedance CMOS Biopotential Integrated Preamplifier. in S Rawat, A Kumar, A Raman, S Kumar & P Pathak (eds), Proceedings of 3rd International Conference on Computational Electronics for Wireless Communications - ICCWC 2023. Lecture Notes in Networks and Systems, vol. 959 LNNS, Springer Science and Business Media Deutschland GmbH, pp. 261-267, 3rd International Conference on Computational Electronics for Wireless Communications, ICCWC 2023, Jalandhar, India, 22/12/23. https://doi.org/10.1007/978-981-97-1943-3_23

A Low Power High Input Impedance CMOS Biopotential Integrated Preamplifier. / Nandini, Porika; Naik, Jatoth Deepak; Gorre, Pradeep et al.
Proceedings of 3rd International Conference on Computational Electronics for Wireless Communications - ICCWC 2023. ed. / Sanyog Rawat; Arvind Kumar; Ashish Raman; Sandeep Kumar; Parul Pathak. Springer Science and Business Media Deutschland GmbH, 2025. p. 261-267 (Lecture Notes in Networks and Systems; Vol. 959 LNNS).

Research output: Chapter in Book / Conference Paper › Conference Paper › peer-review

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AU - Gorre, Pradeep

AU - Al-Shidaifat, Alaaddin

AU - Jooq, Mohammad Khaleqi Qaleh

AU - Kumar, Sandeep

AU - Song, Hanjung

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AB - The front-end amplifier is an essential component in neurological monitoring systems for signal detection and preprocessing, affecting besides the quality of the biosignal but additionally detector size and usage of power. In this study, a unique dual feedback loop-controlled method is presented to account for both signal leakage through the input bias network and leakage currents produced by low-noise amplifiers when they are implemented as integrated circuits. The Front-End Amplifier (FEA) is guaranteed to retain a significant input impedance despite all manufacturing and operating changes thanks to this loop design. Results from simulations using the 65 nm CMOS technology are given. This FEA uses 3.14 μW and accomplishes an input impedance of 2 TΩ and input referred noise of 23 pV/√Hz.

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Nandini P, Naik JD, Gorre P, Al-Shidaifat A, Jooq MKQ, Kumar S et al. A Low Power High Input Impedance CMOS Biopotential Integrated Preamplifier. In Rawat S, Kumar A, Raman A, Kumar S, Pathak P, editors, Proceedings of 3rd International Conference on Computational Electronics for Wireless Communications - ICCWC 2023. Springer Science and Business Media Deutschland GmbH. 2025. p. 261-267. (Lecture Notes in Networks and Systems). doi: 10.1007/978-981-97-1943-3_23

A Low Power High Input Impedance CMOS Biopotential Integrated Preamplifier

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