Abstract
We present an implementation of a programmable axonal propagation delay circuit which uses one first-order log-domain low-pass filter. Delays may be programmed in the 5-50ms range. It is designed to be a building block for time-delay spiking neural networks. It consists of a leaky-integrate-and-fire core, a spike generator circuit, and a delay adaptation circuit.
| Original language | English |
|---|---|
| Title of host publication | Proceedings of the 2011 IEEE International Symposium on Circuits and Systems (ISCAS 2011), Rio de Janeiro, Brazil, 15-18 May 2011 |
| Publisher | IEEE |
| Pages | 869-872 |
| Number of pages | 4 |
| ISBN (Print) | 9781424494736 |
| DOIs | |
| Publication status | Published - 2011 |
| Event | IEEE International Symposium on Circuits and Systems - Duration: 20 May 2012 → … |
Conference
| Conference | IEEE International Symposium on Circuits and Systems |
|---|---|
| Period | 20/05/12 → … |
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