Abstract
This paper presents the design of a dual-output reconfigurable buck-boost switched capacitor converter architecture that can be adapted for applications requiring multiple, distributed on-chip loads. This system uses adaptive gain control and discrete frequency scaling to regulate power delivered. Core-interleaving, an enhanced load regulation scheme, and adaptive switch-sizing control have also been adopted to improve performance. The converter provides a fully-integrated, low-area and fully digital solution. Design and implementation using a standard bulk-CMOS 0.18 µm process provide simulation results showing that the converter has an output voltage range of 1.0-2.2 V, can deliver up to 7.5 mW of power to each load, and is up to 67% efficient, using an active area of only 0.06 mm2.
| Original language | English |
|---|---|
| Pages (from-to) | 59-74 |
| Number of pages | 16 |
| Journal | Microelectronics Journal |
| Volume | 73 |
| DOIs | |
| Publication status | Published - 2018 |
Keywords
- adaptive control systems
- electronics
- switched capacitor circuits
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