Abstract
This paper presents the design of a synchronous non-inverting buck-boost DC-DC converter on a Silicon-on-Sapphire (SOS) 0.5μm process. The converter uses voltage-mode feedback and PWM control to regulate the power delivered to a range of output voltages and loads. The circuit has been simulated using Cadence and its performance has been measured. The converter has an output voltage range of 1.2-4V and can deliver up to 750 mA. It is up to 92% efficient with a maximum ripple voltage of 80mV and uses significantly less die area than similar converters on standard CMOS processes.
| Original language | English |
|---|---|
| Title of host publication | Proceedings of the IEEE Asia-Pacific Conference on Circuits and Systems (APCCAS 2012), 2-5 December 2012, Taiwan |
| Publisher | IEEE |
| Pages | 348-351 |
| Number of pages | 4 |
| ISBN (Print) | 9781457717291 |
| DOIs | |
| Publication status | Published - 2012 |
| Event | IEEE Asia-Pacific Conference on Circuits and Systems - Duration: 2 Dec 2012 → … |
Conference
| Conference | IEEE Asia-Pacific Conference on Circuits and Systems |
|---|---|
| Period | 2/12/12 → … |
Fingerprint
Dive into the research topics of 'A synchronous buck-boost converter on a Silicon-on-Sapphire 0.5µm process'. Together they form a unique fingerprint.Cite this
- APA
- Author
- BIBTEX
- Harvard
- Standard
- RIS
- Vancouver