An analogue neuromorphic co-processor that utilizes device mismatch for learning applications

Chetan Singh Thakur, Runchun Wang, Tara Julia Hamilton, Ralph Etienne-Cummings, Jonathan Tapson, André Van Schaik

Research output: Contribution to journalArticlepeer-review

21 Citations (Scopus)

Abstract

As the integrated circuit (IC) technology advances into smaller nanometre feature sizes, a fixed-error noise known as device mismatch is introduced owing to the dissimilarity between transistors, and this degrades the accuracy of analog circuits. In this paper, we present an analog co-processor that uses this fixed-pattern noise to its advantage to perform complex computation. This circuit is an extension of our previously published trainable analogue block (TAB) framework and uses multiple inputs that substantially increase functionality. We present measurement results of our two-input analogue co-processor built using a 130-nm process technology and show its learning capabilities for regression and classification tasks. We also show that the co-processor, comprised of 100 neurons, is a low-power system with a power dissipation of only 1.1μ W. The IC fabrication process contributes to randomness and variability in ICs, and we show that random device mismatch is favorable for the learning capability of our system as it causes variability among the neuronal tuning curves. The low-power capability of our framework makes it suitable for use in various battery-powered applications ranging from biomedical to military as a front-end analog co-processor.
Original languageEnglish
Pages (from-to)1174-1184
Number of pages11
JournalIEEE Transactions on Circuits and Systems I: Regular Papers
Volume65
Issue number4
DOIs
Publication statusPublished - Apr 2018

Bibliographical note

Publisher Copyright:
© 2004-2012 IEEE.

Keywords

  • integrated circuits
  • neural circuitry
  • neuromorphic engineering

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