CAR-Lite : a multi-rate cochlea model on FPGA

![CDATA[Filters in cochlea models use different coefficients to break sound into a two-dimensional time-frequency representation. On digital hardware with a single sampling rate, the number of bits required to represent these coefficients require substantial computational resources such as memory storage. In this paper, we present a cochlea model operating at multiple sampling rates. As a result, fewer bits are required to represent filter coefficients on hardware as opposed to all the filters operating at a single sampling rate. Additionally, with a 108-filter cochlea implementation, up to nine times fewer coefficients are used than a single sampling rate approach across all filter sections. We present an implementation of 108 filters in Matlab and on an Altera Cyclone V FPGA with a low logic level utilization of 2.57%. Our model can thus be extended to include other auditory processing models such as loudness, pitch perception and timbre recognition on a single FPGA.]]