DELTRON : neuromorphic architectures for delay based learning

Shaista Hussain; Arindam Basu; Mark Wang; Tara Julia Hamilton

doi:10.1109/APCCAS.2012.6419032

DELTRON : neuromorphic architectures for delay based learning

Shaista Hussain, Arindam Basu, Mark Wang, Tara Julia Hamilton

Western Sydney University

Research output: Chapter in Book / Conference Paper › Conference Paper › peer-review

14 Citations (Scopus)

Abstract

![CDATA[We present a neuromorphic spiking neural network, the DELTRON, that can remember and store patterns by changing the delays of every connection as opposed to modifying the weights. The advantage of this architecture over traditional weight based ones is simpler hardware implementation without multipliers or digital-analog converters (DACs). The name is derived due to similarity in the learning rule with an earlier architecture called Tempotron. We present simulations of memory capacity of the DELTRON for different random spatio-temporal spike patterns and also present SPICE simulation results of the core circuits involved in a reconfigurable mixed signal implementation of this architecture.]]

Original language	English
Title of host publication	Proceedings of the 2012 IEEE Asia Pacific Conference on Circuits and Systems: APCCAS 2012: Kaohsiung, Taiwan, 2-5 December 2012
Publisher	IEEE
Pages	304-307
Number of pages	4
ISBN (Print)	9781457717291
DOIs	https://doi.org/10.1109/APCCAS.2012.6419032
Publication status	Published - 2012
Event	IEEE Asia-Pacific Conference on Circuits and Systems - Duration: 2 Dec 2012 → …

Conference

Conference	IEEE Asia-Pacific Conference on Circuits and Systems
Period	2/12/12 → …

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10.1109/APCCAS.2012.6419032

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@inproceedings{e27c8f1e398c46e892b066294e5012c6,

title = "DELTRON : neuromorphic architectures for delay based learning",

abstract = "![CDATA[We present a neuromorphic spiking neural network, the DELTRON, that can remember and store patterns by changing the delays of every connection as opposed to modifying the weights. The advantage of this architecture over traditional weight based ones is simpler hardware implementation without multipliers or digital-analog converters (DACs). The name is derived due to similarity in the learning rule with an earlier architecture called Tempotron. We present simulations of memory capacity of the DELTRON for different random spatio-temporal spike patterns and also present SPICE simulation results of the core circuits involved in a reconfigurable mixed signal implementation of this architecture.]]",

author = "Shaista Hussain and Arindam Basu and Mark Wang and Hamilton, {Tara Julia}",

year = "2012",

doi = "10.1109/APCCAS.2012.6419032",

language = "English",

isbn = "9781457717291",

pages = "304--307",

booktitle = "Proceedings of the 2012 IEEE Asia Pacific Conference on Circuits and Systems: APCCAS 2012: Kaohsiung, Taiwan, 2-5 December 2012",

publisher = "IEEE",

note = "IEEE Asia-Pacific Conference on Circuits and Systems ; Conference date: 02-12-2012",

}

Hussain, S, Basu, A, Wang, M & Hamilton, TJ 2012, DELTRON : neuromorphic architectures for delay based learning. in Proceedings of the 2012 IEEE Asia Pacific Conference on Circuits and Systems: APCCAS 2012: Kaohsiung, Taiwan, 2-5 December 2012. IEEE, pp. 304-307, IEEE Asia-Pacific Conference on Circuits and Systems, 2/12/12. https://doi.org/10.1109/APCCAS.2012.6419032

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T1 - DELTRON : neuromorphic architectures for delay based learning

AU - Hussain, Shaista

AU - Basu, Arindam

AU - Wang, Mark

AU - Hamilton, Tara Julia

PY - 2012

Y1 - 2012

N2 - ![CDATA[We present a neuromorphic spiking neural network, the DELTRON, that can remember and store patterns by changing the delays of every connection as opposed to modifying the weights. The advantage of this architecture over traditional weight based ones is simpler hardware implementation without multipliers or digital-analog converters (DACs). The name is derived due to similarity in the learning rule with an earlier architecture called Tempotron. We present simulations of memory capacity of the DELTRON for different random spatio-temporal spike patterns and also present SPICE simulation results of the core circuits involved in a reconfigurable mixed signal implementation of this architecture.]]

AB - ![CDATA[We present a neuromorphic spiking neural network, the DELTRON, that can remember and store patterns by changing the delays of every connection as opposed to modifying the weights. The advantage of this architecture over traditional weight based ones is simpler hardware implementation without multipliers or digital-analog converters (DACs). The name is derived due to similarity in the learning rule with an earlier architecture called Tempotron. We present simulations of memory capacity of the DELTRON for different random spatio-temporal spike patterns and also present SPICE simulation results of the core circuits involved in a reconfigurable mixed signal implementation of this architecture.]]

UR - http://handle.westernsydney.edu.au:8081/1959.7/uws:41750

U2 - 10.1109/APCCAS.2012.6419032

DO - 10.1109/APCCAS.2012.6419032

M3 - Conference Paper

SN - 9781457717291

SP - 304

EP - 307

BT - Proceedings of the 2012 IEEE Asia Pacific Conference on Circuits and Systems: APCCAS 2012: Kaohsiung, Taiwan, 2-5 December 2012

PB - IEEE

T2 - IEEE Asia-Pacific Conference on Circuits and Systems

Y2 - 2 December 2012

ER -

DELTRON : neuromorphic architectures for delay based learning

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