Hybrid dual-mode low voltage dropout regulator with infinite impulse response digital filters

David Kwong-Heng Phoon; Tara Julia Hamilton; Julian Jenkins

doi:10.1109/LASCAS.2016.7451043

Hybrid dual-mode low voltage dropout regulator with infinite impulse response digital filters

David Kwong-Heng Phoon, Tara Julia Hamilton, Julian Jenkins

Western Sydney University

Research output: Chapter in Book / Conference Paper › Conference Paper › peer-review

Abstract

![CDATA[In this paper we will demonstrate the implementation of a low-dropout hybrid regulator (LDO) that includes a continuous to discrete time feedback loop, in a 28 nm TSMC CMOS technology. The proposed LDO will be given an apriori signal to differentiate between low and high load current states. This mixed mode design is scalable ensuring the best regulation at different load currents for dual or multichannel LDO designs. It has a maximum overshoot of less than 5 mV and undershoot of less than 50 mV with steady state ripple of less than 5 mV. The maximum switching transient time to steady state regulation was found by simulation to be under 830 ps.]]

Original language	English
Title of host publication	Proceedings of the VII IEEE Latin American Symposium on Circuits and Systems (LASCAS), 28 February - 2 March 2016, Florianopolis, Brazil
Publisher	IEEE
Pages	195-198
Number of pages	4
ISBN (Print)	9781467378352
DOIs	https://doi.org/10.1109/LASCAS.2016.7451043
Publication status	Published - 2016
Event	IEEE Latin American Symposium on Circuits and Systems - Duration: 28 Feb 2016 → …

Conference

Conference	IEEE Latin American Symposium on Circuits and Systems
Period	28/02/16 → …

Keywords

filters
neural networks (computer science)
voltage

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10.1109/LASCAS.2016.7451043

Cite this

@inproceedings{3c3c0ef32fb343bdacdf201d00d75570,

title = "Hybrid dual-mode low voltage dropout regulator with infinite impulse response digital filters",

abstract = "![CDATA[In this paper we will demonstrate the implementation of a low-dropout hybrid regulator (LDO) that includes a continuous to discrete time feedback loop, in a 28 nm TSMC CMOS technology. The proposed LDO will be given an apriori signal to differentiate between low and high load current states. This mixed mode design is scalable ensuring the best regulation at different load currents for dual or multichannel LDO designs. It has a maximum overshoot of less than 5 mV and undershoot of less than 50 mV with steady state ripple of less than 5 mV. The maximum switching transient time to steady state regulation was found by simulation to be under 830 ps.]]",

keywords = "filters, neural networks (computer science), voltage",

author = "Phoon, {David Kwong-Heng} and Hamilton, {Tara Julia} and Julian Jenkins",

year = "2016",

doi = "10.1109/LASCAS.2016.7451043",

language = "English",

isbn = "9781467378352",

pages = "195--198",

booktitle = "Proceedings of the VII IEEE Latin American Symposium on Circuits and Systems (LASCAS), 28 February - 2 March 2016, Florianopolis, Brazil",

publisher = "IEEE",

note = "IEEE Latin American Symposium on Circuits and Systems ; Conference date: 28-02-2016",

}

Phoon, DK-H, Hamilton, TJ & Jenkins, J 2016, Hybrid dual-mode low voltage dropout regulator with infinite impulse response digital filters. in Proceedings of the VII IEEE Latin American Symposium on Circuits and Systems (LASCAS), 28 February - 2 March 2016, Florianopolis, Brazil. IEEE, pp. 195-198, IEEE Latin American Symposium on Circuits and Systems, 28/02/16. https://doi.org/10.1109/LASCAS.2016.7451043

Hybrid dual-mode low voltage dropout regulator with infinite impulse response digital filters. / Phoon, David Kwong-Heng; Hamilton, Tara Julia; Jenkins, Julian.
Proceedings of the VII IEEE Latin American Symposium on Circuits and Systems (LASCAS), 28 February - 2 March 2016, Florianopolis, Brazil. IEEE, 2016. p. 195-198.

Research output: Chapter in Book / Conference Paper › Conference Paper › peer-review

TY - GEN

T1 - Hybrid dual-mode low voltage dropout regulator with infinite impulse response digital filters

AU - Phoon, David Kwong-Heng

AU - Hamilton, Tara Julia

AU - Jenkins, Julian

PY - 2016

Y1 - 2016

N2 - ![CDATA[In this paper we will demonstrate the implementation of a low-dropout hybrid regulator (LDO) that includes a continuous to discrete time feedback loop, in a 28 nm TSMC CMOS technology. The proposed LDO will be given an apriori signal to differentiate between low and high load current states. This mixed mode design is scalable ensuring the best regulation at different load currents for dual or multichannel LDO designs. It has a maximum overshoot of less than 5 mV and undershoot of less than 50 mV with steady state ripple of less than 5 mV. The maximum switching transient time to steady state regulation was found by simulation to be under 830 ps.]]

AB - ![CDATA[In this paper we will demonstrate the implementation of a low-dropout hybrid regulator (LDO) that includes a continuous to discrete time feedback loop, in a 28 nm TSMC CMOS technology. The proposed LDO will be given an apriori signal to differentiate between low and high load current states. This mixed mode design is scalable ensuring the best regulation at different load currents for dual or multichannel LDO designs. It has a maximum overshoot of less than 5 mV and undershoot of less than 50 mV with steady state ripple of less than 5 mV. The maximum switching transient time to steady state regulation was found by simulation to be under 830 ps.]]

KW - filters

KW - neural networks (computer science)

KW - voltage

UR - http://handle.uws.edu.au:8081/1959.7/uws:37346

UR - http://ieeexplore.ieee.org/xpl/mostRecentIssue.jsp?punumber=7447194

U2 - 10.1109/LASCAS.2016.7451043

DO - 10.1109/LASCAS.2016.7451043

M3 - Conference Paper

SN - 9781467378352

SP - 195

EP - 198

BT - Proceedings of the VII IEEE Latin American Symposium on Circuits and Systems (LASCAS), 28 February - 2 March 2016, Florianopolis, Brazil

PB - IEEE

T2 - IEEE Latin American Symposium on Circuits and Systems

Y2 - 28 February 2016

ER -

Hybrid dual-mode low voltage dropout regulator with infinite impulse response digital filters

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