Spiking neural network-based auto-associative memory using FPGA interconnect delays

Chong H. Ang; Craig Jin; Philip H. W. Leong; Andre van Schaik

doi:10.1109/FPT.2011.6132701

Spiking neural network-based auto-associative memory using FPGA interconnect delays

Chong H. Ang, Craig Jin, Philip H. W. Leong, Andre van Schaik

MARCS Institute for Brain, Behaviour & Development

Research output: Chapter in Book / Conference Paper › Conference Paper › peer-review

7 Citations (Scopus)

Abstract

This paper describes the design of an auto-associative memory based on a spiking neural network (SNN). The architecture is able to effectively utilize the massive interconnect resources available in FPGA architectures as a good match to the axons in biological neural networks. A complete implementation of the memory on a single FPGA is presented. The signal processing circuitry is composed from simple, parallel building blocks and the training logic is implemented using an on-chip soft processor.

Original language	English
Title of host publication	Proceedings of the 2011 International Conference on Field-Programmable Technology (FPT 2011), New Delhi, India, 12-14 December 2011
Publisher	IEEE
Pages	222-225
Number of pages	4
ISBN (Print)	9781457717413
DOIs	https://doi.org/10.1109/FPT.2011.6132701
Publication status	Published - 2011
Event	International Conference on Field-Programmable Technology - Duration: 12 Dec 2011 → …

Conference

Conference	International Conference on Field-Programmable Technology
Period	12/12/11 → …

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10.1109/FPT.2011.6132701

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@inproceedings{57aeb366455147fea9dc23eae1947031,

title = "Spiking neural network-based auto-associative memory using FPGA interconnect delays",

abstract = "This paper describes the design of an auto-associative memory based on a spiking neural network (SNN). The architecture is able to effectively utilize the massive interconnect resources available in FPGA architectures as a good match to the axons in biological neural networks. A complete implementation of the memory on a single FPGA is presented. The signal processing circuitry is composed from simple, parallel building blocks and the training logic is implemented using an on-chip soft processor.",

author = "Ang, {Chong H.} and Craig Jin and Leong, {Philip H. W.} and Schaik, {Andre van}",

year = "2011",

doi = "10.1109/FPT.2011.6132701",

language = "English",

isbn = "9781457717413",

pages = "222--225",

booktitle = "Proceedings of the 2011 International Conference on Field-Programmable Technology (FPT 2011), New Delhi, India, 12-14 December 2011",

publisher = "IEEE",

note = "International Conference on Field-Programmable Technology ; Conference date: 12-12-2011",

}

Ang, CH, Jin, C, Leong, PHW & Schaik, AV 2011, Spiking neural network-based auto-associative memory using FPGA interconnect delays. in Proceedings of the 2011 International Conference on Field-Programmable Technology (FPT 2011), New Delhi, India, 12-14 December 2011. IEEE, pp. 222-225, International Conference on Field-Programmable Technology, 12/12/11. https://doi.org/10.1109/FPT.2011.6132701

Spiking neural network-based auto-associative memory using FPGA interconnect delays. / Ang, Chong H.; Jin, Craig; Leong, Philip H. W. et al.
Proceedings of the 2011 International Conference on Field-Programmable Technology (FPT 2011), New Delhi, India, 12-14 December 2011. IEEE, 2011. p. 222-225.

Research output: Chapter in Book / Conference Paper › Conference Paper › peer-review

TY - GEN

T1 - Spiking neural network-based auto-associative memory using FPGA interconnect delays

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AU - Jin, Craig

AU - Leong, Philip H. W.

AU - Schaik, Andre van

PY - 2011

Y1 - 2011

N2 - This paper describes the design of an auto-associative memory based on a spiking neural network (SNN). The architecture is able to effectively utilize the massive interconnect resources available in FPGA architectures as a good match to the axons in biological neural networks. A complete implementation of the memory on a single FPGA is presented. The signal processing circuitry is composed from simple, parallel building blocks and the training logic is implemented using an on-chip soft processor.

AB - This paper describes the design of an auto-associative memory based on a spiking neural network (SNN). The architecture is able to effectively utilize the massive interconnect resources available in FPGA architectures as a good match to the axons in biological neural networks. A complete implementation of the memory on a single FPGA is presented. The signal processing circuitry is composed from simple, parallel building blocks and the training logic is implemented using an on-chip soft processor.

UR - http://handle.uws.edu.au:8081/1959.7/545085

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DO - 10.1109/FPT.2011.6132701

M3 - Conference Paper

SN - 9781457717413

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EP - 225

BT - Proceedings of the 2011 International Conference on Field-Programmable Technology (FPT 2011), New Delhi, India, 12-14 December 2011

PB - IEEE

T2 - International Conference on Field-Programmable Technology

Y2 - 12 December 2011

ER -

Spiking neural network-based auto-associative memory using FPGA interconnect delays

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